IIT-K bags ₹5 cr grant-in-aid from electronics, IT ministry

Kanpur: The Indian Institute of Technology (IIT) Kanpur jointly with Silizium Circuits Private Limited has bagged a Rs 5 crore grant-in-aid project from the Ministry of Electronics and Information Technology (MeitY)’s Chips to Startup (C2S) program for its ground-breaking project, “Radio-frequency (RF) Transceiver SoC (System on Chip) with integrated RISC V core for Sub-GHz Applications”.Director, IIT-Kanpur, Prof Abhay Karandikar said, “IIT Kanpur has always been fostering innovation, promoting entrepreneurship, and driving technology commercialization and the Chips to Startup (C2S) project is part of this ongoing drive. The project, which aims at the formulation of an SoC supporting all the prominent standards in sub GHz, will drive innovations in the IoT and indoor applications. The development has tremendous market size and will put India in a stronger position with respect to a complex SoC research and development.” The project duration is three years. IIT Kanpur, as the nodal agency, will be responsible for the development of significant mixed signal IPs and Silizium Circuits will design the RF Front End and System-On-Chip (SoC) along with commercialization. Rijin John, co-founder and CEO Silizium Circuits said, “Semi-conductor IPs (Intellectual Property) will be the brain of all hardware devices. Such an SoC supporting all prominent standards in sub GHz will drive innovations in the IoT and indoor applications whose revenues are forecast to be around $1.3 trillion by 2030. In addition to the final SoC, the IPs such as ADCs (Analog to Digital Convertors), PLL (Phase Locked Loops) and RF front end will also be developed which can target another $488 billion global market. All the low-power applications worldwide in future will require an ultra-low power receiver since it has to be alert to an incoming signal at all times.” Prof Imon Mondal, Prof Chithra and Prof RS Ashwin Kumar from IIT Kanpur and Dr Arun Ashok and Rijin John from Silizium Circuits are the investigators of this project. The project is backed by the end-user ATWIC R&D which is an innovative establishment focused on developing electronics systems and subsystems.