TN to offer subsidies, grant & infrastructure for chip design firms

CHENNAI: The Tamil Nadu govt has decided to provide subsidies and grants to fabless design firms and set up common testing facilities, under the state’s semiconductor Mission 2030, to become competitive in the chip value chain.

The state plans to provide financial incentives to “Tamil Nadu-based entities” engaged in semiconductor design for integrated circuits (ICs), chipsets, system on chips (SoCs), as per a govt order.

It also plans to provide incentives such as payroll subsidy (with a ceiling of Rs5 crore per firm), 50% subsidy (not exceeding Rs 20 crore) for design software and intellectual property sourcing, prototyping, testing, certification and others .

This could complement the Union govt’s design-linked incentives for chips and Tamil Nadu’s broader efforts to build a semiconductor ecosystem.

According to a release from the office of state industries minister T R B Rajaa on Monday, the Tamil Nadu govt is also establishing a centre of excellence to provide infrastructure for chip design, testing and validation.

The CoE will be set up as a special purpose vehicle, promoted by TIDCO with a private sector or academic partner and is expected to provide project grants and land free of cost.

The state’s semiconductor design promotion scheme has a budgetary outlay of Rs 250 crore, testing infrastructure component has a Rs 75 crore outlay, out of Rs 500 crore chip mission announced in the state budget. It is understood that the govt may increase the allocation after the initial stages of implementation.

Meanwhile, Tamil Nadu plans to roll out a workforce development programme to train 1,000 engineering students from the state on platforms such as India Semiconductor Workforce Development Programme (ISWDP), a partnership among IISc, Synopsys and Samsung Semiconductor India Research. As part of this, the govt will sponsor candidates to reputable training facilities outside the country, the release said.

Rajaa said targeted subsidies and prototyping grants will provide fabless design firms the critical early stage support.

“The centres of excellence will anchor research, industry and academia collaboration. By supporting design-led innovation and enabling home-grown IP, we are laying the foundation for Tamil Nadu to become a global hub for tech products and solutions,” he said.

“By combining subsidies for design firms, investments in infrastructure and parks, enabling a pilot fabrication facility and a skilling programme, we are creating a self-sustaining semiconductor value chain, ” said V Arun Roy, state industries secretary.

Recently, the govt announced the setting up of a small-scale production-grade fab in partnership with IIT-M, to train 4,500 technicians across fabrication, testing and packaging. The govt is also progressing with chip equipment manufacturing parks in Sulur and near Palladam, both spanning 100 acres of land.



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